PhD Oral Exam - Nueraimaiti Aimaier, Electrical and Computer Engineering

When studying for a doctoral degree (PhD), candidates submit a thesis that provides a critical review of the current state of knowledge of the thesis subject as well as the student’s own contributions to the subject. The distinguishing criterion of doctoral graduate research is a significant and original contribution to knowledge.

Once accepted, the candidate presents the thesis orally. This oral exam is open to the public.

Abstract

This dissertation investigates the design and development of fully differential switching (class-D) amplifiers optimized for high efficiency, linearity, and compact integration, tailored to low-power applications such as industrial servo valves, Hall effect sensors, and low-power actuators. These loads, commonly employed in automotive and other critical power systems, require differential sine wave inputs at frequencies ranging from several kilohertz to 10 kHz. Traditional linear amplifiers (Class A, B, and AB) are constrained by low efficiency and significant thermal management requirements, while switching amplifiers, despite their inherent efficiency advantages, pose challenges in mitigating nonlinearities and distortions.

The first major contribution is the development of a low-power Selective Harmonic Elimination Pulse-Width Modulation (SHEPWM)-based full-bridge inverter, featuring a novel FPGA hardware implementation. Unlike conventional SHEPWM systems focused on high-power, fixed-frequency applications (50 Hz–60 Hz), this work extends SHEPWM to low-power systems operating at high fundamental output frequencies (4 kHz–10 kHz). A unique FPGA-based architecture enables real-time configurability of output amplitude and frequency, offering flexibility without excessive computational or storage demands. Experimental results demonstrate harmonic elimination up to the 34th order, achieving total harmonic distortion (THD) below 5.1% and efficiency improvements of up to 17.3% compared to natural PWM (NPWM). By integrating this design into a compact system-in-package (SiP) utilizing Gallium Nitride (GaN) power transistors, the inverter achieves significant reductions in printed circuit board (PCB) footprint, offering a robust and versatile solution for next-generation low-power applications.

The second contribution is the design and analysis of a Double Integral Sliding Mode Control (DISMC)-based class-D amplifier. Theoretical work forms the foundation of this research, involving a rigorous analysis of reaching and stability conditions to derive optimal controller gains. The proposed controller employs a double-loop strategy that uses the integrals of inductor current and output voltage tracking errors to ensure robust tracking and stability under varying operating conditions. The theoretical findings are validated through extensive simulation and experimental studies, demonstrating the DISMC’s superior disturbance rejection, enhanced transient response, and reliability compared to conventional proportional-integral (PI) controllers.

By combining innovative control techniques such as SHEPWM and DISMC with compact and efficient hardware designs, this research advances the state of the art in switching amplifier technology. The outcomes offer practical solutions for compact, high-performance systems, addressing critical requirements in modern industrial applications while paving the way for future advancements in power electronics.